In many semiconductor circuits, it is necessary to synchronize output signals such as, for example, data signals, with an external clock. In integrated semiconductor memories which are operated at clock frequencies above 200 MHz, special clock generator circuits are provided for this purpose. These circuits generate an internal clock signal from a clock signal which is applied from an external source. The phase angle of the internal clock signal is matched to the external clock.
To operate the clock generator circuit, the clock generator circuit needs a supply voltage which is supplied directly at the input. The accuracy of the clock generator circuit with respect to the phase angle with which the internal clock signal is generated in comparison with the external clock signal depends on, among other things, the stability of the supply voltage applied. However, since a supply voltage supplied to the integrated semiconductor memory externally is generally not stable enough to ensure that the internal clock signal will be generated with the necessary accuracy, the external supply voltage is not supplied to the clock generator circuits directly. Instead, at least one special voltage generator is provided on every semiconductor chip, which generates a stable regulated supply voltage from the externally supplied supply voltage and supplies the stable voltage to the clock generator circuit.
Although the individual voltage generator on each memory chip generates at the output a stable and regulated supply voltage for the clock generator circuit, the predetermined target value of the supply voltage still has a natural dispersion for all memory chips of a wafer or of a batch, which is influenced by process fluctuations, temperature and other factors. The stabilized supply voltages generated by the voltage generators on the memory chips of a wafer therefore deviate more or less from the predetermined target value. As a result, however, the clock generator circuits of the memory chips on a wafer are also driven by different levels of the supply voltage. Consequently, each clock generator circuit of a memory chip on a wafer generates an internal clock signal which has a different phase angle with respect to the clock signal supplied externally.
Output signals such as data signals which are synchronized with the internal clock are thus generated at different times with respect to the external clock signal. The memory chips on a wafer exhibit a different time response of the output signals. It is necessary that all memory chips, especially in memory modules comprising a number of memory chips, operate clock-synchronously with a clock signal applied externally, but also with respect to one another. This is of importance, especially when the individual memory chips which are arranged on the memory module must provide output data simultaneously.
It is necessary, therefore, that the clock generator circuits of the memory chips generate their internal clock signals with the same phase difference with respect to the clock signal applied externally. Due to the natural distribution of the voltage levels of the supply voltages which are generated by all voltage generators on a wafer, however, the clock generator circuits behave differently with respect to the phase angle of the internal clock signal generated by them with respect to the external clock signal so that the output signals are often generated with different delay times compared with a common external clock signal.